| Fig. 1. Integration of plasmonic-enhanced detector with carbon
nanotube (CNT) complementary metal oxide semiconductor (CMOS) signal
processing circuits. a, Schematic of the 3D integrated circuits,
consisting of bottom-layer passive WFSAs and metal connection lines,
in-between HfO2 dielectrics and Au cross-layer connection lines, and
top-layer plasmonic receiver and CNT CMOS signal processing circuits. b,
Output characteristics of the plasmonic-enhanced barrier-free-bipolar
diode (BFBD) and the normal BFBD under the illumination at "λ" =1200 nm.
c, Electric field pattern of the La=320-nm SA. d-e, Transfer (d) and
output (e) characteristics of the CMOS. f, VTC curves of the CMOS (blue
line) and the 3D integrated circuits (red line). Inset is the
corresponding equivalent circuit diagram of the 3D integrated circuits.
g-i, Statistical figures of merit of the deep-subwavelength modules,
including photocurrent (g) and photovoltage (h) of the BFBD as well as
on-state current of the CMOS (i). |
